Hardware Fundamentals
This is the homepage for the hardware fundamentals course. You can find all course information here.
Course description
This course is for students with a Bachelor in Computer Science (or equivalent) who joined the CESE Master program. The main goals of the course are as follows. First, to "remove the magic" about how computers are build up and operate by systematically discussing the essentials at the different abstraction layers, from bits and transistors up to CPU and system architecture including low level programming and debug. Moreover, the main relationships between the layers will be emphasised for a holistic understanding of digital computers. Next, the main advantages and disadvantages of digital signal processing in respect to its analog counterpart will be discussed. Last but not least, the basic principles behind the discrete systems and control theory will be explained based on real-life examples. All in all, the end goal is to equip the CESE students with a Computer Science background with all the necessary knowledge required to successfully specialise in any of the sub-disciplines represented by the research groups delivering the CESE education.
Course Schedule
Here you can find the schedule of the course. Each lecture is denoted by its week and then the first or second lecture of that week. This lecture schedule is also available on Brightspace where it also contains a list of detailed topics per lecture.
| Topic | Date & Time | Location | |
|---|---|---|---|
| Lecture 1.1 | Welcome Aboard / Introduction | Tuesday 5 September 13:45 | EEMCS-Lecture Hall Chip (36.HB.01.600) |
| Lecture 1.2 | The Transistor | Thursday 7 September 08:45 | EEMCS-Lecture Hall D@ta (36.HB.01.630) |
| Lecture 2.1 | From Transistors to Gates and Logic Structures | Tuesday 12 September 13:45 | EEMCS-Lecture Hall Chip (36.HB.01.600) |
| Lecture 2.2 | The micro-architecture | Thursday 14 September 08:45 | EEMCS-Lecture Hall D@ta (36.HB.01.630) |
| Lab 1 | Combinational and Sequential Logic | Thursday 14 September 13:45 | Drebbelweg-Instruction Room 3 (35.1.160) |
| Lecture 3.1 | Instruction Set Architecture | Tuesday 19 September 13:45 | EEMCS-Lecture Hall Chip (36.HB.01.600) |
| Lecture 3.2 | Instruction Set Architecture | Thursday 21 September 08:45 | EEMCS-Lecture Hall D@ta (36.HB.01.630) |
| Lecture 4.1 | Verilog | Tuesday 26 September 13:45 | EEMCS-Lecture Hall Chip (36.HB.01.600) |
| Lecture 4.2 | Verilog | Thursday 28 September 08:45 | EEMCS-Lecture Hall D@ta (36.HB.01.630) |
| Lab 2 | Verilog | Thursday 28 September 13:45 | Drebbelweg-Instruction Room 3 (35.1.160) |
| Lecture 5.1 | Low-level Programming and Debugging | Tuesday 3 October 13:45 | EEMCS-Lecture Hall Chip (36.HB.01.600) |
| Lecture 5.2 | Discussion on Computer Architectures | Thursday 5 October 08:45 | EEMCS-Lecture Hall D@ta (36.HB.01.630) |
| Lecture 6.1 | Input/Output and Interrupts, Exceptions | Tuesday 10 October 13:45 | EEMCS-Lecture Hall Chip (36.HB.01.600) |
| Lecture 6.2 | Digital and Continuous Signals | Thursday 12 October 08:45 | EEMCS-Lecture Hall D@ta (36.HB.01.630) |
| Lab 3 | (Micro)Architectures | Thursday 12 October 13:45 | Drebbelweg-Instruction Room 3 (35.1.160) |
| Lecture 7.1 | Introduction to Systems | Tuesday 17 October 13:45 | EEMCS-Lecture Hall Chip (36.HB.01.600) |
| Lecture 7.2 | Main system models and transformations | Thursday 19 October 08:45 | EEMCS-Lecture Hall D@ta (36.HB.01.630) |
| Lecture 8.1 | Digital Control Systems (basics) | Tuesday 24 October 13:45 | EEMCS-Lecture Hall Chip (36.HB.01.600) |
| Lecture 8.2 | Digital Control Systems (stability) | Thursday 26 October 08:45 | EEMCS-Lecture Hall D@ta (36.HB.01.630) |
| Lab 4 | Systems & Control | Thursday 26 October 13:45 | Drebbelweg-Instruction Room 3 (35.1.160) |
| Final Exam | Friday 10 November 9:00 | CEG-Instruction Room 1.97 (23.HG.1.97) |
Grading
The course consists out of a written exam and 4 lab assignments. Each lab assignment is pass/fail and you are required to pass each lab in order to pass the course. A final grade of 6 is needed to pass the course. Each lab also has a bonus assignment which can reward you 0.25 points extra on top of your final grade. For example, if you get a 7 on the exam and you complete 2 bonus assignments during the labs, your final grade is a 7.5.